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Design And Test Strategies For 2d3d Integration For Nocbased Multicore Architectures 1st Ed 2020 Kanchan Manna

  • SKU: BELL-10800584
Design And Test Strategies For 2d3d Integration For Nocbased Multicore Architectures 1st Ed 2020 Kanchan Manna
$ 31.00 $ 45.00 (-31%)

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Design And Test Strategies For 2d3d Integration For Nocbased Multicore Architectures 1st Ed 2020 Kanchan Manna instant download after payment.

Publisher: Springer International Publishing
File Extension: PDF
File size: 2.42 MB
Author: Kanchan Manna, Jimson Mathew
ISBN: 9783030313098, 9783030313104, 3030313093, 3030313107
Language: English
Year: 2020
Edition: 1st ed. 2020

Product desciption

Design And Test Strategies For 2d3d Integration For Nocbased Multicore Architectures 1st Ed 2020 Kanchan Manna by Kanchan Manna, Jimson Mathew 9783030313098, 9783030313104, 3030313093, 3030313107 instant download after payment.

This book covers various aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems. It gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling for NoC-based multicores. The authors describe the use of the Integer Line Programming (ILP) technique for smaller benchmarks and a Particle Swarm Optimization (PSO) to get a near optimal mapping and test schedule for bigger benchmarks. The PSO-based approach is also augmented with several innovative techniques to get the best possible solution. The tradeoff between performance (communication or test time) of the system and thermal-safety is also discussed, based on designer specifications.

  • Provides a single-source reference to design and test for circuit and system-level approaches to (NoC) based multicore systems;
  • Gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling in (NoC) based multicore systems;
  • Organizes chapters systematically and hierarchically, rather than in an ad hoc manner, covering aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.


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