Design And Verification Of Microprocessor Systems For Highassurance Applications 1st Edition Matt Kaufmann by Matt Kaufmann, J Strother Moore (auth.), David S. Hardin (eds.) 9781441915382, 9781441915399, 1441915389, 1441915397 instant download after payment.

Design and Verification of Microprocessor Systems for High-Assurance Applications

Edited by:

David S. Hardin

This book examines several leading-edge design and verification technologies that have been successfully applied to microprocessor systems for high-assurance applications at various levels – from arithmetic circuits to microcode to instruction sets to operating systems to applications. We focus on recent hardware, software, and system designs that have actually been built and deployed, and feature systems that have been certified at high Evaluation Assurance Levels, namely the Rockwell Collins AAMP7G microprocessor (EAL7) and the Green Hills INTEGRITY-178B separation kernel (EAL6+). The contributing authors to this book have endeavored to bring forth truly new material on significant, modern design and verification efforts; many of the results described herein were obtained only within the past year.

• Offers practical case studies of the successful application of formal methods at several different levels of real-world microprocessor system design;
• Discusses high-robustness design techniques that support formal verification;
• Shows how "Design for Verification" can become "Design with Verification", using modern verification tool suites that can readily import engineering designs;
• Features chapters written by practitioners who have achieved the highest assurance Evaluation Assurance Level (EAL) certifications defined by the Common Criteria;
• Formally develops the "GWV" family of information flow theorems used in recent EAL6+ and EAL7 certifications;
• Explains how designs expressed in new model-based development languages can be analyzed and verified;
• Demonstrates ways in which various kinds of formal verification tools can be utilized in combination to achieve a final verification result.