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Formal Methods For Hardware Verification 6th International School On Formal Methods For The Design Of Computer Communication And Software Systems Sfm 2006 Bertinoro Italy May 2227 2006 Advanced Lectures 1st Edition Nicola Bombieri

  • SKU: BELL-1548310
Formal Methods For Hardware Verification 6th International School On Formal Methods For The Design Of Computer Communication And Software Systems Sfm 2006 Bertinoro Italy May 2227 2006 Advanced Lectures 1st Edition Nicola Bombieri
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Formal Methods For Hardware Verification 6th International School On Formal Methods For The Design Of Computer Communication And Software Systems Sfm 2006 Bertinoro Italy May 2227 2006 Advanced Lectures 1st Edition Nicola Bombieri instant download after payment.

Publisher: Springer-Verlag Berlin Heidelberg
File Extension: PDF
File size: 2.88 MB
Pages: 244
Author: Nicola Bombieri, Franco Fummi (auth.), Marco Bernardo, Alessandro Cimatti (eds.)
ISBN: 9783540343042, 3540343040
Language: English
Year: 2006
Edition: 1

Product desciption

Formal Methods For Hardware Verification 6th International School On Formal Methods For The Design Of Computer Communication And Software Systems Sfm 2006 Bertinoro Italy May 2227 2006 Advanced Lectures 1st Edition Nicola Bombieri by Nicola Bombieri, Franco Fummi (auth.), Marco Bernardo, Alessandro Cimatti (eds.) 9783540343042, 3540343040 instant download after payment.

This book presents a set of 8 papers accompanying the lectures of leading researchers given at the 6th edition of the International School on Formal Methods for the Design of Computer, Communication and Software Systems, SFM 2006, held in Bertinoro, Italy in May 2006.

SFM 2006 was devoted to formal techniques for hardware verification and covers several aspects of the hardware design process, including hardware design languages and simulation, property specification formalisms, automatic test pattern generation, symbolic trajectory evaluation, BDD-based and SAT-based model checking, decision procedures, refinement, theorem proving, and the verification of floating point units.

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