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High Performance Embedded Architectures And Compilers Third International Conference Hipeac 2008 Gteborg Sweden January 2729 2008 Proceedings 1st Edition Mateo Valero

  • SKU: BELL-4605844
High Performance Embedded Architectures And Compilers Third International Conference Hipeac 2008 Gteborg Sweden January 2729 2008 Proceedings 1st Edition Mateo Valero
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High Performance Embedded Architectures And Compilers Third International Conference Hipeac 2008 Gteborg Sweden January 2729 2008 Proceedings 1st Edition Mateo Valero instant download after payment.

Publisher: Springer-Verlag Berlin Heidelberg
File Extension: PDF
File size: 9.46 MB
Pages: 400
Author: Mateo Valero, Jesús Labarta (auth.), Per Stenström, Michel Dubois, Manolis Katevenis, Rajiv Gupta, Theo Ungerer (eds.)
ISBN: 9783540775591, 9783540775607, 3540775595, 3540775609
Language: English
Year: 2008
Edition: 1

Product desciption

High Performance Embedded Architectures And Compilers Third International Conference Hipeac 2008 Gteborg Sweden January 2729 2008 Proceedings 1st Edition Mateo Valero by Mateo Valero, Jesús Labarta (auth.), Per Stenström, Michel Dubois, Manolis Katevenis, Rajiv Gupta, Theo Ungerer (eds.) 9783540775591, 9783540775607, 3540775595, 3540775609 instant download after payment.

This highly relevant and up-to-the-minute book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, January 27-29, 2008.

The 25 revised full papers presented together with 1 invited keynote paper were carefully reviewed and selected from 77 submissions.

The papers are organized into topical sections on a number of key subjects in the field, including multithreaded and multicore processors, reconfigurable ASIP, and compiler optimizations.

Also covered are industrial processors and application parallelization, power-aware techniques, and high-performance processors.

The book also contains material on the collection and analysis of profiles as well as optimizing memory performance.

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