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Lowpower Variationtolerant Design In Nanometer Silicon Bhunia

  • SKU: BELL-22002640
Lowpower Variationtolerant Design In Nanometer Silicon Bhunia
$ 35.00 $ 45.00 (-22%)

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Lowpower Variationtolerant Design In Nanometer Silicon Bhunia instant download after payment.

Publisher: Springer
File Extension: PDF
File size: 8.61 MB
Author: Bhunia, Swarup(Editor)
ISBN: 9781441974174, 9781441974181, 1441974172, 1441974180
Language: English
Year: 2010

Product desciption

Lowpower Variationtolerant Design In Nanometer Silicon Bhunia by Bhunia, Swarup(editor) 9781441974174, 9781441974181, 1441974172, 1441974180 instant download after payment.

Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.

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