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Transientinduced Latchup In Cmos Integrated Circuits Mingdou Ker

  • SKU: BELL-4313442
Transientinduced Latchup In Cmos Integrated Circuits Mingdou Ker
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Transientinduced Latchup In Cmos Integrated Circuits Mingdou Ker instant download after payment.

Publisher: Wiley-IEEE Press
File Extension: PDF
File size: 37.56 MB
Pages: 256
Author: Ming?Dou Ker, Sheng?Fu Hsu(auth.)
ISBN: 9780470824078, 9780470824092, 0470824077, 0470824093
Language: English
Year: 2009

Product desciption

Transientinduced Latchup In Cmos Integrated Circuits Mingdou Ker by Ming?dou Ker, Sheng?fu Hsu(auth.) 9780470824078, 9780470824092, 0470824077, 0470824093 instant download after payment.

Content:
Chapter 1 Introduction (pages 1–21):
Chapter 2 Physical Mechanism of TLU under the System?Level ESD Test (pages 23–45):
Chapter 3 Component?Level Measurement for TLU under System?Level ESD Considerations (pages 47–73):
Chapter 4 TLU Dependency on Power?Pin Damping Frequency and Damping Factor in CMOS Integrated Circuits (pages 75–93):
Chapter 5 TLU in CMOS ICs in the Electrical Fast Transient Test (pages 95–112):
Chapter 6 Methodology on Extracting Compact Layout Rules for Latchup Prevention (pages 113–150):
Chapter 7 Special Layout Issues for Latchup Prevention (pages 151–168):
Chapter 8 TLU Prevention in Power?Rail ESD Clamp Circuits (pages 169–206):
Chapter 9 Summary (pages 207–210):

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